Digital Verification Engineer

Singapore, Singapore

Job Description

Responsibilities: 1. Define verification plan regarding functional design specification 2. Develop various verification model 3. Perform co-verification of processor models and RTL including appli Responsibilities: 1. Define verification plan regarding functional design specification 2. Develop various verification model 3. Perform co-verification of processor models and RTL including application software and firmware verification 4. Support the development of multi abstraction/views to enable a thorough Soc verification from unit level to system level 5. Pre-silicon(FPGA) validation and post-silicon validation support Requirements: 1. BSEE or MSEE degree with 18 years' experience in ASIC/complex SoC verification. Some RTL design/modeling experience is a plus. 2. Proficient with UVM 3. Proficient with system Verilog and various shell languages (perl, csh, tcl, sh, etc) 4. FPGA validation and chip validation experience is a plus. 5. Proficient with AMBA AHB/AXI/APB protocol and have knowledge of various peripheral protocols which like I2C, UART, USB, SDIO, Audio etc 6. Experience of SOC designs with embedded processor cores and their integration with other system components including memory subsystems and peripherals. 7. Familiar with Microprocessor and/or DSP instruction sets and how low-level driver software integrates into SOC architecture. Familiar with HDL languages, simulation tools and testbench design, low-level assembler languages and C, or C++, scripting languages

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Job Detail

  • Job Id
    JD1188215
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    $84000 - 168000 per year
  • Employment Status
    Permanent
  • Job Location
    Singapore, Singapore
  • Education
    Not mentioned