Job Description

Be part of the revolution

Together, we revolutionize space, automotive, robotics (including UAV, UGV), IoT and aviation industries with cutting-edge innovations in ultra-reliability electronics that protect lives in all operating environment. The work we do is immensely challenging but satisfying. Our people are not afraid to question the status quo, enter unchartered waters to solve meaningful problems and push the boundaries of science. If there is fire in your belly to make an outsized impact in the emerging industries, join our team!



Layout Engineer

About the Job

• Develop digital and analog library cells in various technologies (e.g. CMOS & SOI)
• Layout digital cells for various trade-offs (including speed, power, area, reliability)
• Layout analogue circuits and IO circuits
• Characterize digital cell cells for timing and power analyses
• Construct test structures for validating various digital and analogue cells
• Analyse the reliability issues (e.g. soft-errors) for various digital cells
• Support the front-end team for System-on-Chip (SoC) integration

Minimum Qualifications

• Possess at least a bachelor\xe2\x80\x99s degree or equivalent in Electrical & Electronic Engineering or any related field with background on Integrated Circuit Design (both Analog and Digital)
• Knowledge in Electronic Design Automation (EDA) tools (e.g. Cadence, Synopsys, Silvaco)
• Knowledge in cell characterization tools (e.g. Liberate or SiliconSmart or Viola)
• Knowledge in Application Specific Integrated Circuit (ASIC) designs (full custom design methodology)
• Knowledge in digital circuit reliability issues (e.g. latch-up, soft error rates, aging, threshold voltage shift, etc.)
• Experience in digital foundation library cell development (e.g. combinational cells, sequential logic cell, memory cells, IOs)
• Experience in library cell characterization (e.g. understanding in various timing and power models)
• Experience on circuit testing
• Proficiency in English