Job Description

Job Responsibilities:

Develop and innovative GaN on SiC HEMT epitaxial processes on an MOCVD system, focusing on recipe development achieving high carrier mobility, low threading dislocation density, on 6/8-inch substrates.

Design of experiments to minimize line defects, point defects and extended defects density, with emphasis on enhancing GaN HEMT device performance.

Selective GaN regrowth for contact formation.

Metrology and characterization of GaN/AlGaN epilayers (e.g. carrier mobility, threading dislocation density, FWHM rocking curve, thickness uniformity, surface roughness, crystal quality, stress, carrier mobility, etc.).

Preparation of technical presentations and papers for internal meetings, as well as conferences and journals.

Working with NSTIC-GaN and related team to solve key technical challenges in the GaN RF electronics industry.

Publishing technical papers and drafting technical disclosures / IP.

Contributing ideas towards new funding proposals.

All other reasonable duties, as assigned.

Job Requirements:

Master's degree in electrical/Electronic Engineering, Materials Science, Physics, or a related field for Lead Process Engineer position.

Above 8 - 10 years of proven experience in compound semiconductor epitaxy process development/manufacturing (GaN or III-V preferred).

Knowledge of semiconductor processes (lithography, etch, etc.) and characterization techniques (SEM, TEM, XRD, etc.) is a plus.

Excellent communication, collaboration, and self-motivation skills.

Avid technical reader, critical thinker, and team player.

Proficiency in data analysis and DOE tools (Excel, JMP, Origin, etc.) is beneficial.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Type of Employment :

Full-Time

Minimum Experience :

8 Years

Work Location :

Fusionopolis