Job Description

Advanced wafer level packaging has become a promising alternative or compliment to the scaling of CMOS in driving the semiconductor indstry. IME is an established leader in advanced wafer level packaging research and developing packaging platfroms such as high density FOWLP, 2.5D/3D packaging and co-packaged optics required for heterogenous integration of chiplets. At IME, staffs will have the opportunity to work with state-of-the-art process equipment to explore and embark on pathfinding research in advanced wafer level packaging.

Job Scope :

Wafer processing and integration for 2.5D/3D heterogeneous integration.

Perform wafer lot handling, metrology inspection and process data analysis. On the job training with senior staff.

Support C2W, W2W bonding processes like hybrid bonding, fusion bonding for 2.5D/3D integration.

Propose new improvement to existing processes or integration flows.

File patents/know-hows on new development activities.

Publish new findings and technological advancement in prestigious journals and overseas/local conferences.

Job Requirements :

Bachelor/Master Degree in Electronic / Microelectronics / Material Engineering / Material Science/ Chemistry / Physics.

Prior experience in semiconductor wafer processing and integration is preferred.

Knowledge of advanced packaging technologies such as TSV, Cu damascene, CMP, Bumping, FOWLP would be an advantage.

Good Knowledge on semiconductor backend processes.

Good analytical, communication and presentation skills.

At least 3 years' experience in semiconductor industry preferred.

On-the-job mentorship will be provided

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.