Job Description

Be part of the revolution

Together, we revolutionize space, automotive, robotics (including UAV, UGV), IoT and aviation industries with cutting-edge innovations in ultra-reliability electronics that protect lives in all operating environment. The work we do is immensely challenging but satisfying. Our people are not afraid to question the status quo, enter unchartered waters to solve meaningful problems and push the boundaries of science. If there is fire in your belly to make an outsized impact in the emerging industries, join our team!



Senior Analog Layout Designer

Job Identification

• Position Title: Senior Analog Layout Designer
• Division/Dept./Section: Engineering

Organizational Relationship

• Reports to Team lead
• Supervises Intern

Job Objective/s

Zero-Error Systems (ZES) is currently seeking a senior analog layout IC Designer to join our team and help us revolutionize the industry. The analog IC designer will work with IC designer to work on different analog IC designs for various applications including commercial, automotive and space.

Roles and Responsibilities

• Fast development of analog IC physical designs, including layout drawing, DRC, LVS
• Layout extractions and analysis for IC designers
• Develop analog and/or digital library cells in various technologies (e.g. CMOS & SOI)
• Layout digital cells for various trade-offs (including speed, power, area, reliability)
• Layout analog circuits and IO circuits
• Characterize digital cell cells for timing and power analyses
• Construct test structures for validating various digital and analog cells
• Layout integration and optimization
• Advise IC designers for best layout practice

Authorities

• Work with the IC design team to deliver IC physical designs
• Support the team lead for layout design integrations

Requirements

Minimum Requirements

• Polytechnical degree in electrical engineering or related field
• Strong experience in analog physical design, particularly bandgap, amplifier, comparator, LDO, current sensing, power switch, etc.
• Proficiency with industry-standard tools such as Cadence, Spectre, HSPICE, and Matlab
• Familiarity with CMOS, BiCMOS, and other process technologies
• Excellent problem-solving skills and ability to work in a fast-paced startup environment
• At least 3-year experience of analog layout design with at 2 IC product tapeouts.

Preferred Requirements

• Bachelor\xe2\x80\x99s degree or above
• Some understanding of circuit analysis and implementation
• Strong expertise in power management including DC/DC converter design.
• Able to do design verifications

Measures of Performance

Key Result Area

• Physical Design
• IC circuit design

Measure of Performance

• Together with the layout engineer, successful delivery of the physical IC designs that meet the specifications
• Some understanding of the implemented circuits, and able to assist IC designers with design verifications.

Please forward resume to ZES HR at info@zero-erorsystems.com