Developing current and future CMOS technology device by working closely with teams across the organization including Process, Circuit, Design, Layout and Modeling/TCAD. Interface with Design Engineers during early development phase to define transistor targets, transistor models, and follow through on optimization of critical layout constrained Design Rules. Conduct and analyze silicon experiments for future device generations. Validate transistor models and propose corrective actions as needed. Analyze electrical test structures results, design rule verification, and CMOS process monitoring. Foster a collaborative working style and team spirit. Perform electrical failure analysis(EFA) to solve technical problems using lab tools and techniques. Drive Physical Failure Analysis (PFA) and Root Cause Analysis and long-term countermeasures with global organizations. Assess impact on System Performance to prevent CMOS related failure exposure for the customer. Employ data analytical skills for high volume data analysis. Masters/PhD in Electrical Engineering, Semiconductor Device Technology, or related field. Equivalent experience in the semiconductor industry will also be considered. Experience in CMOS device design, simulation, characterization and development of Analog/CMOS transistors operating at higher Voltages. Experience using schematic and layout tools, TCAD simulation, micro probing. Knowledge of Programming Languages such as Python/C/C++ is an added advantage. Effective communication skills in written and spoken English. Good multitasking skills and ability to set priorities in a fast moving, dynamic environment. Excellent problem solving, analytical & presentation skills. Self-motivation and enthusiastic.
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