Job Description

About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact Come and join the excitement of developing worlds highest performance serial links!
Marvells Central Engineering Group is responsible for development of range of mixed signal IPs that support Marvells success in Datacenter, Networking, and ASIC businesses. From industry leading designs of high performance SerDes and PHY, analog front ends to IPs such as ADC/DACS, temperature sensors and PLLs, Central Engineering group delivers the essential technology behind this success.
What You Can Expect
The candidate will be working on analog design of high-speed and high-performance SerDes in advanced technology nodes, 3nm, 2nm and beyond.
Participate in SerDes Architecture Development with DSP, Analog and Digital design teams.
Work with the AE for the IP characterization and validation plan
Product and customer supporting.
Provide instructions to the layout engineers.
What We're Looking For
PhD in Electrical Engineering or related fields.
Strong analog design fundamentals and experience in designing analog circuit blocks such as PLL, Data Converters, Oscillators and high-speed SerDes blocks (CTLE, FFE, DFE, CDR, PLL, Line driver, etc.).
Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.
Good understanding of analog layout optimization for high-speed designs
Knowledge in system level pre-tape out analog validation
Knowledge in silicon bring-up and debugging efforts
Strong communication and documentation skills
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what its like to work at Marvell, visit our page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
#LI-MC2