Scientist / Senior Scientist (3d Heterogeneous Integration And Advance Wafer Level Packaging), Ime

Buona Vista, Singapore

Job Description


Advanced wafer level packaging has become a promising alternative or compliment to the scaling of CMOS in driving the semiconductor industry. IME is an established leader in advanced wafer level packaging research and developing packaging platforms such as high density FOWLP, 2.5D/3D packaging and co-packaged optics required for heterogenous integration of chiplets. At IME, staffs will have the opportunity to work with state-of-the-art process equipment to explore and embark on pathfinding research in advanced wafer level packaging.

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Candidate will be part of heterogeneous integration group focused on development of the advanced packaging technology platforms to enable System-in-Packages. He/she will work with cross functional team to:

  • Define and shape IME\'s 2.5D/3D IC packaging technologies roadmap.
  • Explore and develop advanced C2W/W2W hybrid bonding processes requirement for various integration flows and applications.
  • Develop design rules and PDK for 2.5D/3D IC packaging technologies.
  • Prepare competitive grant research project proposals and lead execution of these projects.
  • Engage industry partners to align and develop the building blocks required for next generations advanced packaging platforms.
  • Work with technical and business development team to initiate new industry consortia projects with supply chain companies.
  • Collaborate with other programs, A*STAR institutes, IHLs for research grant projects proposals preparation.
  • File patents/know-hows on new development activities.
  • Publish new findings and technological advancement in prestigious journals and overseas/local conferences.
Job Requirement:
  • PhD with specialization in Electronic / Microelectronics / Material Engineering / Material Science/ Chemistry / Physics.
  • Preferred more than 5-year experience in semiconductor wafer processing and integration.
  • Good Knowledge of advanced packaging technologies such as TSV, Cu damascene, FOWLP, C2W/W2W bonding would be an advantage.
  • Good Knowledge on semiconductor backend processes.
  • Good analytical, communication and presentation skills.
  • At least 3 years\' experience in semiconductor industry preferred.
The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.
Type of Employment : Full-Time
Minimum Experience : 3 Years
Work Location : Fusionopolis

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Job Detail

  • Job Id
    JD1313413
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    Buona Vista, Singapore
  • Education
    Not mentioned