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Your primary responsible is to lead and develop of FPGA/CPLD design for Keysight test & measurement instrument. Design activities involving in microprocessor and micro-controller base subsystem, DSP, glue logic, functional specific, system and inter-IC IO interface design (eg, PCIe, SPI, I2S, JESD204B), high speed memory interface, multi-clock domain & PLLs block design. You will also be involving in hardware circuit design as secondary role.
You are required to work closely with hardware, mechanical, software (application and embedded) engineers within the development team to define and optimize the FPGA/CPLD system design to maximize the performance and quality with minimum cost. Typical activities require for this job are
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