Job Description

Advanced wafer level packaging has become a promising alternative or compliment to the scaling of CMOS in driving the semiconductor industry. IME is an established leader in advanced wafer level packa Advanced wafer level packaging has become a promising alternative or compliment to the scaling of CMOS in driving the semiconductor industry. IME is an established leader in advanced wafer level packaging research and developing packaging platforms such as high density FOWLP, 2.5D/3D packaging and co-packaged optics required for heterogenous integration of chiplets. At IME, staffs will have the opportunity to work with state-of-the-art process equipment to explore and embark on pathfinding research in advanced wafer level packaging. : Support wafer processing and integration for 2.5D/3D heterogeneous integration and thermal management, specifically for 3D IC cooling. Independently perform wafer lot handling, metrology inspection and data analysis. Update and presentation of project status, data and results to internal and external collaborators and customers. Propose new improvement to existing processes or integration flows. File patents/know-hows on new development activities. Publish new findings and technological advancement in prestigious journals and overseas/local conferences. Job Requirements Bachelor/Master Degree in Electronic / Microelectronics / Mechanical / Material Engineering / Material Science/ Chemistry. Prior experience in semiconductor wafer processing and integration is preferred. Prior experience in CVD, PVD processes is preferred. Good Knowledge on semiconductor backend processes. Knowledge of advanced packaging technologies such as TSV, Cu damascene, CMP, bumping, FOWLP would be an advantage. Knowledge in thermal management, fluid mechanics is an advantage. Good analytical, communication and presentation skills. On-the-job mentorship will be provided