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Sr. Manager Test Engineering
The product verification team is seeking a DFT lead engineer to join exciting career on Scan, MBIST, iJTAG test development of latest 7nm MPSoC (Multi Processor System on Chip) products and beyond. The IPs range from ARM based Processor to critical IPs which provide automotive, data centre, machine learning and high-speed communication solutions. You will work closely with designers to make sure DFT structures are correctly inserted, with test engineers to make sure ATE test programs can be generated from the DFT (ATPG, MBIST) tools, with product engineers to make sure scan/mbist production test can run seamlessly and stable, and with yield engineers to debug and root-cause failures/defects. You will also be creating RTL design utilizing FPGA fabric resources to build communication logic for stimulus and response delivery between device and ATE.
Key responsibilities include but are not limited to:
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