Job Description

Job description: * Technical Manager for embedded memory design and verification in advanced nodes for high performance 5G AP-SOC, ASIC's targeting Cloud AI/ Data Center Network Switch and 5G infra Job description: Technical Manager for embedded memory design and verification in advanced nodes for high performance 5G AP-SOC, ASIC's targeting Cloud AI/ Data Center Network Switch and 5G infrastructure. Collaborate closely with product and architecture teams to define, design and develop high performance customized semiconductor memories including CPU caches, SoC SRAM and TCAM. Innovate, design and incorporate special circuits and features to achieve best-in-class PPA for custom and compiler memories. Job requirements: With minimum 10 years of hands-on experience in design of embedded memories (SRAM, TCAM) for high performance processors or ASICs in advanced nodes such as 3nm/5nm Good understanding of Digital Circuit design techniques in FinFet technologies. Exposure to complete design cycle of SRAM memory and compiler development Supervise layout engineers and review layout for optimality. Experience in using industry standard schematic entry tools, advanced transistor level simulators (XA, HSIM, FINESIM) Experience with LEC tools (ESPCV) Ability to review and coordinate layout activities Ability to come up with design verification and test plans Silicon debug and bring up experience is a plus Working knowledge of scripting in Perl/Python Willingness to collaborate closely with cross functional teams across the globe.